A cross point memory array is an array of memory cells disposed between two sets of conductors running orthogonally above and below the memory cells. The first set of conductors, disposed below the memory cells for example, may be referred to as the word lines, while the second set of conductors, disposed above the memory cells, may be referred to as bit lines. Each memory cell in the cross point memory array is disposed at the cross point of a single word line and a single bit line. Selection of a single memory cell within the array for reading or writing the memory cell can be achieved by activating the word line and bit line associated with that memory cell. The reading of the selected memory cell may be achieved by applying a voltage to the word line and measuring the resulting current through the selected memory cell. During the reading of the selected memory cell, leakage currents, also known as parasitic currents or half-select currents, may be generated in the memory cells adjacent to the selected memory cell. The leakage current adds to the current through the selected memory cell, possibly resulting in incorrect results.